METHOD OF DESIGNING A PROGRAMMABLE LOGIC CONTROLLER LADDER LOGIC AND A GENERATING LADDER CODE, CAPABLE OF MINIMIZING A LOGIC ERROR

摘要

PURPOSE: A method of designing a programmable logic controller ladder logic and a generating ladder code is provided to verify the logic error of a ladder code by simulating the change of state of an output coil according to the change of state of a specific input contact point.;CONSTITUTION: An active diagram editor(110) designs an PLC control logic. A ladder diagram generator(120) reads an AD-XML. The ladder diagram generator generates XML format. A ladder diagram editor(130) visualizes the generated LD-XML format. An I/O port simulator(140) detects the logical error of a ladder code.;COPYRIGHT KIPO 2011