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Simulating a casting process in casting tool with cavity and gate channel connected with the cavity over gate opening, comprises calculating set of parameter values, which characterize time course of states of melt flowing into the cavity
Simulating a casting process in casting tool with cavity and gate channel connected with the cavity over gate opening, comprises calculating set of parameter values, which characterize time course of states of melt flowing into the cavity
The method for simulating a casting process in a casting tool (10) with a cavity (12) and a gate channel (16) connected with the cavity over a gate opening (18), comprises calculating a set of parameter values, which characterize the time course of states of a melt flowing into the cavity of the casting tool, verifying if a parameter value lies outside of an associated predetermined set value range, changing the shape of the cavity during determining a deviation in the verifying step, and repeating the calculation and verification steps. The method for simulating a casting process in a casting tool (10) with a cavity (12) and a gate channel (16) connected with the cavity over a gate opening (18), comprises calculating a set of parameter values, which characterize the time course of states of a melt flowing into the cavity of the casting tool, verifying if a parameter value lies outside of an associated predetermined set value range, changing the shape of the cavity during determining a deviation in the verifying step, and repeating the calculation and verification steps. The parameter values are set as boundary conditions for the state of the melt at all gate openings over the entire time course. The calculation step is simultaneously simulated from the flow of the melt into the cavity through the gate opening. The method further comprises calculating a further set of parameter values, which characterize the time course of states of the melt flowing into the gate channel of the casting tool, verifying if the parameter value lies outside of the associated predetermined set value range, and changing the shape of the gate channel during determining the deviation in the verifying step, and repeating the calculation and verification steps.
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