Transistor size design methods and transistor size design apparatus

摘要

PROBLEM TO BE SOLVED: To provide a method for designing transistor size capable of remarkably reducing a design period unnecessary in simulation of circuit data in cell library cell design in the method for designing the transistor size in layout design of each cell of a cell library for semiconductor integrated circuit design. ;SOLUTION: The method is provided with a stage for promoting input of data for simulation of a pair of circuits connecting a drive element as an input side and a load element as an output side on each division combination by dividing a plurality of basic logic elements into the drive element and the load element, a stage for making the transistor size a parameter every input paired circuit, performing circuit operation simulation and obtaining characteristic information including at least an operation speed every paired circuit as the transistor size is made the parameter, and a stage for finding the optimum value of the transistor size from the characteristic information every paired circuit obtained on each cell of the cell library and the circuit data of a cell.;COPYRIGHT: (C)2003,JPO