首页> 外国专利> METHOD OF SELECTING CMOS/SOI TRANSISTOR STRUCTURES RESISTANT TO EFFECT OF FULL ABSORBED DOSE OF IONISING RADIATION

METHOD OF SELECTING CMOS/SOI TRANSISTOR STRUCTURES RESISTANT TO EFFECT OF FULL ABSORBED DOSE OF IONISING RADIATION

机译:抗电离辐射全吸收剂量效应的CMOS / SOI晶体管结构的选择方法

摘要

FIELD: physics.;SUBSTANCE: in the method of selecting CMOS/SOI transistor structures which are resistant to the effect of full absorbed dose of ionising radiation, for each process solution, an additional pair of n- and p-channel transistor channels made from the same technology is formed on the chip along with the main LSI circuit; for limited sampling, LSI specimens are removed discretely with a step of about 100 krad(Si) in the TID range from zero to the level of requirements for resistance of the LSI to the effect of maximum TID plus 20% of the relationship ID=f(VGs); data are obtained therefrom on change in shift of threshold voltage ΔVTH from the TID value through a dose of not less than about 1000 rad(Si)·s-1 taking into account manufacturing tolerance and possible boundaries of variation of the relationship VTH(TID); lower and upper allowable boundaries of relationships VTH(TID) of transistors of both conductivity types are approximated; the dispersion of measured values is determined for each fixed TID value; the value ΔVTH(↑↓) without exposure is determined for the minimum on the curve for an n-channel transistor and for the virtually achieved maximum level of exposure; ΔVth(↑↓) is determined for the same conditions for all possible combinations of differences "VTh(TID)-Up" and "Vth(TID)-Down" of n-MOS and p-MOS transistors, ΔVth(↑↓) is determined for three fixed LSI TID values; the LSI are ranked on four gradations of the observed values of ΔVth(↑↓): "high" ("1") - maximum change; "significant" ("2") - strong change; "average" ("3") - moderate changes; "low" ("4") - weak changes, which on the average value are sorted as "1"%:"2"%:"3"%:"4"%, where the "low" gradation is taken as 100%; ΔVth(↑↓) is measured for non-exposed industrial LSI specimens and the results of ranking exposed specimens are used to determine the possibility of using in exposure conditions those specimens for which the gradation of change in the value of ΔVth(↑↓) corresponds to categories "4" and "3".;EFFECT: possibility of selecting industrial LSI which are resistant to TID effects without conducting an exposure experiment to measure radiation drift of threshold voltage ΔVth.;7 dwg
机译:领域:物理学;实质:在选择能抵抗电离辐射的全部吸收剂量影响的CMOS / SOI晶体管结构的方法中,对于每种处理溶液,还需要另外一对由n沟道和p沟道晶体管制成相同的技术与主LSI电路一起形成在芯片上。对于有限的采样,在大约从零到LSI抵抗最大TID的影响的要求水平外加大约100 krad(Si)的TID步长,离散地移除LSI样本,再加上I D = f(V Gs );从阈值电压ΔV TH 从TID值到不小于约1000 rad(Si)·s -1 的剂量的变化而获得的数据帐户制造公差和关系V TH (TID)的可能变化边界;下部和上部 TH (TID)的“ undefined” imgFormat =“ GIF” wi =“ 10” />的允许边界近似;为每个固定的TID值确定<图像文件=“ 00000064.GIF” he =“ 6” imgContent =“ undefined” imgFormat =“ GIF” wi =“ 46” />;确定未曝光的值ΔV TH (↑↓),确定曲线上的最小值<图像文件=“ 00000065.GIF” he =“ 6” imgContent =“ undefined” imgFormat =“ GIF” wi =“ 20” />用于n沟道晶体管以及实际上达到的最大曝光水平;对于所有可能的差值“ V Th (TID)-Up”和“ V th th (↑↓) n-MOS和p-MOS晶体管的Sub>(TID)-Down”,为三个固定的LSI TID值确定第ΔV (↑↓)。 LSI根据ΔV th (↑↓)的观察值的四个等级进行排名:“高”(“ 1”)-最大变化; “重大”(“ 2”)-重大更改; “平均值”(“ 3”)-适度的变化; “低”(“ 4”)-弱变化,其平均值按“ 1”%:“ 2”%:“ 3”%:“ 4”%进行分类,其中“低”等级为100 %;对未暴露的工业LSI样品测量ΔV th (↑↓),并使用对暴露样品进行排名的结果来确定在暴露条件下使用那些变化程度渐变的样品的可能性。 ΔV th (↑↓)的值对应于类别“ 4”和“ 3”。效果:无需进行暴露实验即可测量TID效应的工业LSI即可测量辐射的漂移阈值电压ΔV th .; 7 dwg

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号