Modeling approach for timing closure in hierarchical designs leveraging the separation of horizontal and vertical aspects of the design flow

摘要

A method of designing a model of an integrated circuit block, an electronic design automation tool and a non-transitory computer-readable medium are disclosed herein. In one embodiment, the method includes: (1) generating an input and output timing budget for the block based on design constraints of the block and a netlist of the block, (2) updating the input and output timing budget with clock customization data based on designer knowledge of the integrated circuit and (3) providing the model for the block based on the update of the input and output timing budget, wherein the model represents clock information of the block separately from data path information of the block.