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FINFET DESIGN WITH A TRENCH ISOLATION STRUCTURE AND A MANUFACTURING METHOD OF A FINFET

机译:具有沟槽隔离结构的FINFET设计及其制造方法

摘要

PURPOSE: A FinFET(Fin Field Effect Transistor) design and a manufacturing method of a FinFET are provided to improve hole mobility by using SiP, SiC, and a InAs or InP.;CONSTITUTION: A trench isolation structure is arranged on a semiconductor substrate to separate an NMOS area(1500) from a PMOS area. A first pin structure comprises silicon or SiGe arranged on the film of a III-V group semiconductor material with high band gap energy and a larger lattice constant than Ge. A second pin structure comprises silicon or SiGe arranged on a III-V group semiconductor material with high band gap energy and a smaller or the same lattice constant as Ge. A metal gate is vertically aligned on the first and second pin structures.;COPYRIGHT KIPO 2013;[Reference numerals] (1000) Complete strain Si_1-xGe_x: 1x0.25; (500) Mitigated III-V: InP, AllnAs, InGaAs, GaAsSb, etc.
机译:目的:提供一种FinFET(鳍式场效应晶体管)设计和FinFET的制造方法,以通过使用SiP,SiC和InAs或InP来提高空穴迁移率;组成:将沟槽隔离结构布置在半导体衬底上以将NMOS区域(1500)与PMOS区域分开。第一pin结构包括布置在III-V族半导体材料的膜上的硅或SiGe,其具有高带隙能量并且比Ge更大的晶格常数。第二引脚结构包括布置在III-V族半导体材料上的硅或SiGe,其具有高带隙能量并且具有与Ge相比较小或相同的晶格常数。金属栅极在第一和第二引脚结构上垂直对齐。; COPYRIGHT KIPO 2013; [参考数字](1000)完整应变Si_1-xGe_x:1

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