A system with a processor, on which a plurality of, simultaneously active embodiment entities is to be carried out, and with a plurality of, the execution of entities the course of a reciprocating manner cache - sections - memory cache having

摘要

A system with a processor (200), on which a plurality of simultaneously active embodiment entities, for example, processes, tasks or threads, can be performed, a memory that is coupled to the processor (206) and a coupled to the processor cache - memory (100; 202),- wherein the cache memory (100; 202) a plurality of cache - sections (102, 106) and a cache - controller (108), each said cache - section of a plurality of cache - memory locations, each said cache - portion (102, 106) is designed in such a way that it stores information, the requirements of in each case one associated embodiment entity of the plurality of execution of entities include,characterized by the,that each execution of entity a design entity identifier (''greek naturalisation industry'') is associated with,in the memory (206) a plurality of instruction memory areas are defined, the in each case to an embodiment of the entity identifier (''greek naturalisation industry''), so that the embodiment of the entity identifier (''greek naturalisation industry'') on the basis of the memory area, from which a command has been retrieved, can be determined, andthat the cache - controller on the basis of the embodiment of the entity identifier (''greek naturalisation industry'') when accessing the cache - memory (100; 202) an associated cache - portion (102, 106) selects.