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Method of fabricating semiconductor structure, by formulating first and/or second substrate layer to exhibit Coefficient of Thermal Expansion (CTE) closely matching CTE of first and/or additional semiconductor layer
Method of fabricating semiconductor structure, by formulating first and/or second substrate layer to exhibit Coefficient of Thermal Expansion (CTE) closely matching CTE of first and/or additional semiconductor layer
The method involves forming a first substrate layer over a surface of a first semiconductor layer, and thermally spraying a second substrate layer (310) on a side of the first substrate layer opposite the first semiconductor layer. At least one additional semiconductor layer is epitaxially grown over the first semiconductor layer on a side opposite the first substrate layer. The first and/or second substrate layer is formulated to exhibit a CTE closely matching a CTE of at least one of the first semiconductor layer and the additional semiconductor layer. An independent claim is also included for a semiconductor structure.
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