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Structure and method for single gate non-volatile memory device having a capacitor well doping design with improved coupling efficiency
Structure and method for single gate non-volatile memory device having a capacitor well doping design with improved coupling efficiency
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机译:具有改善的耦合效率的电容器阱掺杂设计的单栅非易失性存储器件的结构和方法
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摘要
The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.
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