首页> 外国专利> SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BASIS FOR DETECTING SELF-MODIFYING CODE INCLUDING MODIFICATION OF A CACHE LINE WITH AN EXECUTING INSTRUCTION

SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BASIS FOR DETECTING SELF-MODIFYING CODE INCLUDING MODIFICATION OF A CACHE LINE WITH AN EXECUTING INSTRUCTION

机译:确定缓存行基础上的存储器拥有量的系统和方法,用于检测包括修改带有执行指令的缓存行的自修改代码

摘要

A processor that determines memory ownership on a cache line basis for detecting self-modifying code including modification of a cache line with an executing instruction. An ownership index and corresponding cache line address are entered for each cache line into an ownership queue. The ownership index is provided with each instruction derived from the cache line. When the instruction is issued, an executing bit is set in the corresponding entry. When a destination address of a store instruction matches an entry in the ownership queue, the store instruction is marked to invoke an executing exception if the executing bit of the entry is set. When a store instruction that is ready to retire is marked to invoke the executing exception, the store instruction is allowed to retire, the processor is flushed, and the next instruction after the store instruction is re-fetched to continue processing.
机译:一种处理器,在高速缓存行的基础上确定存储器所有权,以检测包括通过执行指令对高速缓存行进行修改的自修改代码。将每个缓存行的所有权索引和相应的缓存行地址输入到所有权队列中。所有权索引随从高速缓存行派生的每条指令一起提供。发出指令时,将在相应的条目中设置执行位。当存储指令的目标地址与所有权队列中的条目匹配时,如果设置了该条目的执行位,则将该存储指令标记为调用执行异常。当将准备退出的存储指令标记为调用执行异常时,将允许该存储指令退出,处理器将被刷新,并重新获取存储指令之后的下一条指令以继续处理。

著录项

  • 公开/公告号US2017308477A1

    专利类型

  • 公开/公告日2017-10-26

    原文格式PDF

  • 申请/专利权人 VIA ALLIANCE SEMICONDUCTOR CO. LTD.;

    申请/专利号US201615156429

  • 发明设计人 BRENT BEAN;COLIN EDDY;

    申请日2016-05-17

  • 分类号G06F12/0875;G06F12/0891;

  • 国家 US

  • 入库时间 2022-08-21 13:51:21

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号