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Apparatus and method for conversion between analog and digital domains with a time stamp for a digital control system and ultra low error rate communications channel
Apparatus and method for conversion between analog and digital domains with a time stamp for a digital control system and ultra low error rate communications channel
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机译:用于具有数字控制系统的时间戳和超低错误率通信信道的模拟和数字域之间的转换的装置和方法
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摘要
An apparatus and method is disclosed with embodiments of a: 1. digital to analog and reference time converter; 2. analog and reference time to digital converter; 3. Sheahan non-linear time-varying, analog and digital control system; and 4. Sheahan Communication Channel are described in detail herein. Some embodiments use time stamp having 72 bits of time data sufficient to identify each clock pulse of a 9.192631770 GHz clock signal plus an additional 8 bits representing 28=256 interpolated clock phases in order reach a resolution of approximately 0.425 picoseconds per clock phase. Thus an 80 bit time stamp is generated and used as described herein.
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