INCREASE DATA TRANSFER THROUGHPUT BY ENABLING DYNAMIC JTAG TEST MODE ENTRY AND SHARING OF ALL JTAG PINS

摘要

In described examples, an integrated circuit (100) includes functional circuitry (114) and testing circuitry (112). The testing circuitry (112) has a state machine operable in multiple different states. The integrated circuit (100) also has a pin (P2) for receiving a signal (TMS). The state machine is operable to transition between states in response to a change in level of the signal (TMS). Circuitry couples the signal (TMS) of the pin (P2), in a first level, to the state machine in a first time period for causing the state machine to enter a predetermined state, and circuitry (124) maintains the signal (TMS) in the first level to the state machine in a second time period for maintaining the state machine in the predetermined state. Also, during the second time period, circuitry couples data received at the pin (P2) to a destination circuit (122) other than the state machine. The destination circuit (122) is operable to perform successive scan tests using data from the pin (P2) without a power on reset of the functional circuitry (114).