LOW COMPLEXITY DECODER AND DECODING METHOD BASED ON SIGN OF BIT NODE

摘要

Disclosed is a decoder implemented by a computing device. The decoder comprises: an operation unit configured to repeatedly implement a check node operation and a bit node operation for an input frame at least temporarily implemented by the processor of the computing device; a processor configured to determine whether to input the bit node in the next check node operation based on the code of the operated bit node; and an output unit for outputting a decoded bit based on the determined bit node. Accordingly, the present invention can improve performance and reduces the decoding computational complexity.