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DEVICE FOR ACCELERATED CALCULATING MATRIX OF INCOMPLETE PARALLELISM
DEVICE FOR ACCELERATED CALCULATING MATRIX OF INCOMPLETE PARALLELISM
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机译:不完全并行的加速计算矩阵的设备
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摘要
FIELD: physics.;SUBSTANCE: to the known device containing a matrix of m rows and n columns of elements of a homogeneous medium, n unit counting blocks, a maximum finding block, an adder, a memory block, an accelerated matrix of the partial parallelism matrix containing a matrix of (ij) (i = 1, 2, …, N, j = 1, 2, …, M) of the D-triggers of the input data synchronization, the matrix from (i.j) (i = 1, 2, …, N, j = 1, 2, …, M) of OR elements, a clock generator, a frequency multiplier, 3 pulse counters, 3 decoders, 4 OR elements, 2 AND elements, and a NO-AND gate, 2 D-triggers, a shift register, a comparison element, a comparison element with zero, 2 registers, 2 multiplexers, 4-port RAM, 5 single-port RAM.;EFFECT: increasing the device speed due to the introduction of tools for the accelerated calculation of the incomplete parallelism matrix.;2 dwg
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