Critical-word-first reordering of cache fills to accelerate cache memory accesses, and related processor-based systems and methods are disclosed. In this regard in one embodiment, a cache memory is provided. The cache memory comprises a data array comprising a cache line, which comprises a plurality of data entry blocks configured to store a plurality of data entries. The cache memory also comprises cache line ordering logic configured to critical-word-first order the plurality of data entries into the cache line during a cache fill, and to store a cache line ordering index that is associated with the cache line and that indicates the critical-word-first ordering of the plurality of data entries in the cache line. The cache memory also comprises cache access logic configured to access each of the plurality of data entries in the cache line based on the cache line ordering index for the cache line.
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