首页> 外国专利> Silicon carbide semiconductor substrate, method for manufacturing silicon carbide semiconductor substrate, and method for manufacturing silicon carbide semiconductor device where depression supression layer is formed on backside surface of base substrate opposite to main surface on which epitaxial layer is formed

Silicon carbide semiconductor substrate, method for manufacturing silicon carbide semiconductor substrate, and method for manufacturing silicon carbide semiconductor device where depression supression layer is formed on backside surface of base substrate opposite to main surface on which epitaxial layer is formed

机译:碳化硅半导体衬底,制造碳化硅半导体衬底的方法以及制造碳化硅半导体器件的方法,其中在基底衬底的与形成外延层的主表面相对的背面上形成凹陷抑制层

摘要

A silicon carbide semiconductor substrate includes: a base substrate that has a main surface having an outer diameter of not less than 100 mm and that is made of single-crystal silicon carbide; an epitaxial layer formed on the main surface; and a deformation suppression layer formed on a backside surface of the base substrate opposite to the main surface. In this way, the deformation suppression layer suppresses the substrate from being deformed (for example, warped during high-temperature treatment). This can reduce a risk of causing defects such as crack in the silicon carbide semiconductor substrate during the manufacturing process in performing a method for manufacturing a silicon carbide semiconductor device using the silicon carbide semiconductor substrate.
机译:碳化硅半导体衬底包括:基底衬底,其主表面具有不小于100mm的外径,并且由单晶碳化硅制成;在主表面上形成的外延层;变形抑制层形成在基底基板的与主表面相反的背面上。以此方式,变形抑制层抑制了基板变形(例如,在高温处理期间翘曲)。在执行使用碳化硅半导体衬底的制造碳化硅半导体器件的方法时,这可以减小在制造过程期间在碳化硅半导体衬底中引起诸如裂纹的缺陷的风险。

著录项

  • 公开/公告号US9818608B2

    专利类型

  • 公开/公告日2017-11-14

    原文格式PDF

  • 申请/专利权人 SUMITOMO ELECTRIC INDUSTRIES LTD.;

    申请/专利号US201414910169

  • 发明设计人 TAKEYOSHI MASUDA;TAKU HORII;

    申请日2014-06-25

  • 分类号H01L29/78;H01L21/02;H01L21/04;H01L29/66;H01L29/16;H01L29/06;

  • 国家 US

  • 入库时间 2022-08-21 12:56:42

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