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Coherent state among multiple simulation models in an EDA simulation environment
Coherent state among multiple simulation models in an EDA simulation environment
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机译:EDA仿真环境中多个仿真模型之间的相干状态
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摘要
A circuit design is simulated in a simulation environment. When a simulation model in the simulation environment transfers state information to a second simulation model, the simulation environment receives the state information and makes it available to the second simulation model without simulating the transfer through the simulated circuit design.
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