METHOD FOR EQUIVALENT HIGH SAMPLING RATE FIR FILTERING BASED ON FPGA

摘要

The present invention provides a method for equivalent high sampling rate FIR filtering based on FPGA, first, the coefficients h(k) of FIR filter are found by using MATLAB, multiplied by an integer and then rounded for the purpose that the rounded coefficients h(k) can be directly used into a FPGA, then the ADC's output of high data rate f_s is lowered by dividing the ADC's output x(n) into M parallel data streams x_i(n) of low data rate, and the M×L samples in one clock circle is obtained by delaying the M parallel data streams x_i(n) simultaneously by 1, 2, . . . , L′ periods of the synchronous clock, at last, the samples y_i(n) of FIR filtering output is calculated according to the samples selected from the M×L samples, and the filtered data y(n) of data rate f_s is obtained by putting the samples y_i(n) together in ascending order of i. Thus, the continuous FIR filtering of an ADC's output sampled with high sampling rate is realized, while the data rates before and after the FIR filtering are unchanged.