An improved sense amplifier with a bit line precharge circuit for reading flash memory cells of the array

摘要

The present invention relates to an improved sense amplifier for reading values in flash memory cells of an array. In one embodiment, the sense amplifier includes an improved precharge circuit for precharging the bit line during the precharge period to increase the speed of the read operations. In another embodiment, the sense amplifier includes a simplified address decoding circuitry to increase the speed of the read operations.