首页> 外国专利> FPGA MATCHING DEVICE OF HIGH SPEED SNORT RULE AND YARA RULE BASED ON FPGA

FPGA MATCHING DEVICE OF HIGH SPEED SNORT RULE AND YARA RULE BASED ON FPGA

机译:基于FPGA的高速规则和YARA规则的FPGA匹配装置。

摘要

The present invention relates to an FPGA-based fast snort rule and Yarra rule matching device, comprising: a detection rule converter for converting a snort rule and a yarra rule into a format for a detection function; And receiving an input packet input from a network based on the rule converted into the format, detecting a fixed pattern in a high speed packet processing module, matching a PCRE pattern in a PCRE detection module, and performing a dynamic hash and match control module. After checking the policy to apply the same file search result through the detection result processing module, the mitigation control signal is read and then read the corresponding input packet stored in the packet FIFO in the mitigation policy application module to apply the detection result application policy. Detection engine for sending in the packet; characterized in that it comprises a.
机译:本发明涉及一种基于FPGA的快速snort规则和yarra规则匹配装置,包括:检测规则转换器,用于将snort规则和yarra规则转换为用于检测功能的格式。并且基于转换为格式的规则从网络接收输入的输入分组,在高速分组处理模块中检测固定模式,在PCRE检测模块中匹配PCRE模式,并执行动态哈希和匹配控制模块。在通过检测结果处理模块检查了应用相同文件搜索结果的策略之后,读取缓解控制信号,然后读取缓解策略应用模块中存储在数据包FIFO中的相应输入数据包,以应用检测结果应用策略。检测引擎,用于发送数据包;其特征在于包括一个。

著录项

  • 公开/公告号KR102014736B1

    专利类型

  • 公开/公告日2019-08-28

    原文格式PDF

  • 申请/专利权人 (주)피즐리소프트;

    申请/专利号KR20170115180

  • 发明设计人 이호재;강병완;장성민;박석영;

    申请日2017-09-08

  • 分类号H04L29/06;G06F9/30;

  • 国家 KR

  • 入库时间 2022-08-21 11:47:57

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