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APPARATUS AND METHOD FOR MEASURING PERFORMANCE DEGRADATION RESULTED BY TOTAL IONIZING DOSE EFFECT ON INTEGRATED CIRCUIT USING FULLY-DEPLETED SILICON-ON-INSULATORPROCESS
APPARATUS AND METHOD FOR MEASURING PERFORMANCE DEGRADATION RESULTED BY TOTAL IONIZING DOSE EFFECT ON INTEGRATED CIRCUIT USING FULLY-DEPLETED SILICON-ON-INSULATORPROCESS
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机译:用全耗尽型绝缘硅工艺测量整体电路上电离剂量效应对整体电路造成的性能下降的装置和方法
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摘要
The present invention relates to an apparatus and a method for measuring performance deterioration of an integrated circuit using a complete deletion mode silicon-on-insulator process caused by a total ionization dose effect. The apparatus for measuring circuit performance deterioration caused by a total ionization dose effect includes: a first inverter; an N^th inverter directly connected to the first inverter or indirectly connected to the first inverter through at least one different inverter; and a switch selectively connecting the first inverter to any one of external and the N^th inverter. The first inverter may include: a controlled stress transistor; an uncontrolled stress transistor connected to the controlled stress transistor in series; a transfer gate transistor selectively connecting the uncontrolled stress transistor to an IN node; a stress mode biasing transistor performing biasing of the stress transistor and the uncontrolled stress transistor; and a power switch transistor turning on/off the biasing. The present invention can extend the life of an integrated circuit, thereby reducing maintenance costs for a circuit or a device.
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