Connect an external network co-processor to a network processor packet parser

摘要

A method in a network processor chip (100) having first transmission protocol ports (200-203), each supporting data path traffic from packets having a minimum size M bytes to N bidirectional lanes (170) at a speed of S GBits / s and traffic having different ones Transmission protocol units (120, 130) in the network processor chip (100) on n other bidirectional lanes (190) at a speed of s Gbit / s, for using the first transmission protocol ports (200-203) to access an external coprocessor (110) support packet parsing network logic (230-233) located in each of the first transmission protocol ports (200-203) which requests a request to the external co-processor during a parsing period upon receipt of a minimum sized M byte packet; 110) and receives a response from the external coprocessor (110), the method comprising in that the packet parser (140; 230-233) sends a request of a maximum of m bytes to the coprocessor (110) on the n other bidirectional lanes at a rate of s Gbit / s and a maximum m byte word response from the external co-processor (110). on the same other bidirectional lanes at a rate of s Gbit / s, so that the formula NxS / M≤nxs / m is considered; andbefore transmitting traffic on the n further bidirectional lanes at a rate of s Gbit / s, multiplexing the coprocessor access data traffic with a maximum of m byte word in a first transmission protocol port (200-203), and traffic with one of the different transmission protocol units (120, 130) in the network processor chip (100) in a two-input multiplexer (340, 341, 400-403), the two-input multiplexer (340, 341, 400-403) statically multiplexing to one of the two Data traffic is configurable.