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TECHNIQUES FOR FORMING LOGIC INCLUDING INTEGRATED SPIN-TRANSFER TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
TECHNIQUES FOR FORMING LOGIC INCLUDING INTEGRATED SPIN-TRANSFER TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
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机译:形成包括自旋传递转矩集成磁阻随机存取存储器的逻辑的技术
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摘要
Techniques are disclosed for forming a logic device including integrated spin-transfer torque magnetoresistive random-access memory (STT-MRAM). In accordance with some embodiments, one or more magnetic tunnel junction (MTJ) devices may be formed within a given back-end-of-line (BEOL) interconnect layer of a host logic device. A given MTJ device may be formed, in accordance with some embodiments, over an electrically conductive layer configured to serve as a pedestal layer for the MTJ's constituent magnetic and insulator layers. In accordance with some embodiments, one or more conformal spacer layers may be formed over sidewalls of a given MTJ device and attendant pedestal layer, providing protection from oxidation and corrosion. A given MTJ device may be electrically coupled with an underlying interconnect or other electrically conductive feature, for example, by another intervening electrically conductive layer configured to serve as a thin via, in accordance with some embodiments.
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