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Auto-zero technique for opamps with a source-follower output stage based on replica referencing

机译:基于复本引用的源极跟随器输出级运放自动归零技术

摘要

An electronic circuit comprises an input stage, a gain stage operatively coupled to the input stage, a primary output stage operatively coupled to the gain stage, a replica output stage operatively coupled to the gain stage in parallel to the primary output stage, and a clock circuit. The clock circuit operates the electronic circuit in multiple phases including a sampling phase to disconnect the primary output stage and the replica output stage from the gain stage to obtain an offset voltage, an active phase to reconnect the primary output stage to apply the offset voltage to reduce an offset at the primary output stage, and an intermediate phase to first reconnect the replica output stage to the gain stage prior to the active phase.
机译:一种电子电路,包括输入级,可操作地耦合至输入级的增益级,可操作地耦合至增益级的主输出级,可操作地耦合至增益级且与初级输出级并联的副本输出级以及时钟电路。时钟电路在多个阶段操作电子电路,其中包括采样阶段,以使初级输出级和副本输出级与增益级断开连接,以获得偏置电压;激活阶段,将初级输出级重新连接以将偏置电压施加至减少主输出级的偏移,以及减少中间阶段以在活动阶段之前先将副本输出级重新连接到增益级。

著录项

  • 公开/公告号US10673398B2

    专利类型

  • 公开/公告日2020-06-02

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号US201816162975

  • 发明设计人 MICHELE PICCARDI;

    申请日2018-10-17

  • 分类号H03F1/02;H03F3/45;H03F1/08;H03G3/30;

  • 国家 US

  • 入库时间 2022-08-21 11:27:53

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