Comparator for globally distributed regulators

摘要

A method for offset calibration of a voltage comparator is disclosed according to certain aspects of the present disclosure. The method includes applying a first bias voltage to a gate of a first compensation transistor, wherein the first compensation transistor is coupled in series with a first input transistor of the voltage comparator. The method also includes applying a second bias voltage to a gate of a second compensation transistor, wherein the second compensation transistor is coupled in series with a second input transistor of the voltage comparator. The method further includes sensing a logic value at an output of the voltage comparator, and adjusting the first bias voltage and the second bias voltage based on the sensed logic value.