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Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
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机译:缓存存储由地址计算加载指令获取的数据,其中标签用作关联名称,供消费指令参考
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摘要
A processor architecture includes a register file hierarchy to implement virtual registers that provide a larger set of registers than those directly supported by an instruction set architecture to facilitate multiple copies of the same architecture register for different processing threads, where the register file hierarchy includes a plurality of hierarchy levels. The processor architecture further includes a plurality of execution units coupled to the register file hierarchy.
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