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ENHANCING STABILITY OF HALF PERIMETER WIRE LENGTH (HPWL)-DRIVEN ANALYTICAL PLACEMENT

机译:增强半直径导线长度(HPWL)驱动的分析位置的稳定性

摘要

The performance of a computer performing electronic design analysis is improved by representing a putative circuit design as a set of movable blocks of predetermined size which must fit into a bounding box (said blocks include a plurality of subsets to be interconnected by wires) and initially placing the set of blocks by quadratic initialization. Each of the blocks has first and second coordinates and weights are assigned to nets connecting those of the blocks within the subsets, the quadratic initialization in turn includes determining a cost of each of the nets connecting any two of the blocks within the subsets as one-half of a sum of squares of distances between the any two of the blocks; and minimizing a total cost over all of the nets to determine an initial placement of the set of blocks. Analytical placement is then carried out based on the initial quadratic placement.
机译:通过将假定的电路设计表示为一组预定大小的可移动块,并必须将其装入边界盒(所说的块包括要通过电线互连的多个子集),可以提高执行电子设计分析的计算机的性能。通过二次初始化的一组块。每个块都有第一坐标和第二个坐标,权重分配给连接子集内各个块的网的权重,二次初始化依次包括确定连接子集内任意两个块的每个网的成本为-任何两个块之间的距离的平方和的一半;并最小化所有网上的总成本以确定该组块的初始放置。然后,根据初始二次放置进行分析放置。

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