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CIRCUIT AND METHOD FOR OVERCOMING MEMORY BOTTLENECK OF ASIC-RESISTANT CRYPTOGRAPHIC ALGORITHMS
CIRCUIT AND METHOD FOR OVERCOMING MEMORY BOTTLENECK OF ASIC-RESISTANT CRYPTOGRAPHIC ALGORITHMS
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机译:克服抗ASIC的密码算法的内存瓶颈的电路和方法
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摘要
An application-specific integrated circuit (ASIC) and method are provided for executing a memory-hard algorithm requiring reading generated data. A processor or state machine executes one or more steps of the memory-hard algorithm and requests the generated data. At least one specialized circuit is provided for generating the generated data on demand in response to a request for the generated data from the processor. Specific embodiments are applied to memory-hard cryptographic algorithms, including Ethash and Equihash.
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