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Digitally controlled oscillator and all-digital frequency-locked loop and phase-locked loop based on digitally controlled oscillator

摘要

A digitally controlled oscillator, including: a frequency divider chain, configured to perform frequency division on an input clock signal to produce K basic clock signals, wherein frequencies and periods of the K basic dock signals are the same and a time difference between two adjacent basic clock signals is a basic time unit; and a frequency synthesizer, configured to receive the K basic clock signals from the frequency divider chain, determine a first period and a second period according to the basic time unit and a frequency control word, and generate a synthetic clock signal based on the K basic clock signals, wherein the synthetic clock signal uses the first period and the second period in an alternate manner.

著录项

  • 公开/公告号US10715154B2

    专利类型

  • 公开/公告日2020.07.14

    原文格式PDF

  • 申请/专利权人

    申请/专利号US15761708

  • 发明设计人 Liming Xiu;

    申请日2017.08.31

  • 分类号

  • 国家 US

  • 入库时间 2022-08-21 10:59:00

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