首页> 外国专利> RÉDUCTION DE COLLISION DE RANGÉES MULTIPLES DANS UN SYSTÈME DE MÉMOIRE HYBRIDE PARALLÈLE-SÉRIE

RÉDUCTION DE COLLISION DE RANGÉES MULTIPLES DANS UN SYSTÈME DE MÉMOIRE HYBRIDE PARALLÈLE-SÉRIE

摘要

Systems, methods, and computer programs are disclosed for allocating memory in a hybrid parallel/serial memory system. One method comprises configuring a memory address map for a multi-rank memory system with a dedicated serial access region in a first memory rank and a dedicated parallel access region in a second memory rank. A request is received for a virtual memory page. If the request comprises a performance hint, the virtual memory page is selectively assigned to a free physical page in the dedicated serial access in the first memory rank and the dedicated parallel access region in the second memory rank.

著录项

  • 公开/公告号EP3427153B1

    专利类型

  • 公开/公告日2020.05.27

    原文格式PDF

  • 申请/专利权人 Qualcomm Incorporated;

    申请/专利号EP17707143.8

  • 发明设计人

    申请日2017.02.09

  • 分类号

  • 国家 EP

  • 入库时间 2022-08-21 10:53:18

相似文献

  • 专利
  • 外文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号