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Extending Moore’s Law for Silicon CMOS using More-Moore and More-than-Moore Technologies

机译:使用摩尔定律和摩尔定律技术扩展硅CMOS的摩尔定律

摘要

With the advancement of silicon electronics under threat from physical limits to dimensional scaling, the International Technology Roadmap for Semiconductors (ITRS) released a white paper in 2008, detailing the ways in which the semiconductor industry can keep itself continually growing in the twenty-first century. Two distinct paths were proposed: More-Moore and More-than-Moore. While More-Moore approach focuses on the continued use of state-of-the-art, complementary metal oxide semiconductor (CMOS) technology for next generation electronics, More-than-Moore approach calls for a disruptive change in the system architecture and integration strategies. In this doctoral thesis, we investigate both the approaches to obtain performance improvement in the state-of-the-art, CMOS electronics. udWe present a novel channel material, SiSn, for fabrication of CMOS circuits. This investigation is in line with the More-Moore approach because we are relying on the established CMOS industry infrastructure to obtain an incremental change in the integrated circuit (IC) performance by replacing silicon channel with SiSn. We report a simple, low-cost and CMOS compatible process for obtaining single crystal SiSn wafers. Tin (Sn) is deposited on silicon wafers in the form of a metallic thin film and annealed to facilitate diffusion into the silicon lattice. This diffusion provides for sufficient SiSn layer at the top surface for fabrication of CMOS devices. We report a lowering of band gap and enhanced mobility for SiSn channel MOSFETs compared to silicon control devices. udWe also present a process for fabrication of vertically integrated flexible silicon to form 3D integrated circuits. This disruptive change in the state-of-the-art, in line with the More-than-Moore approach, promises to increase the performance per area of a silicon chip. We report a process for stacking and bonding these pieces with polymeric bonding and interconnecting them using copper through silicon vias (TSVs). We report a process for fabricating through polymer vias (TPVs) facilitating the fabrication of sensor arrays and control electronics on the opposite sides of the same flexible polymer. Finally, we present a process to fabricate stretchable metallic thin films with up to 800% stretchability, and report two distinct applications for these devices which cannot be done using current techniques.
机译:随着硅电子技术的发展,从物理极限到尺寸缩放的威胁,国际半导体技术路线图(ITRS)在2008年发布了一份白皮书,详细介绍了半导体行业在二十一世纪保持自身持续增长的方式。 。提出了两种不同的路径:摩尔定律和摩尔定律。 More-Moore方法专注于继续为下一代电子设备使用最新的互补金属氧化物半导体(CMOS)技术,而More-than-Moore方法则要求对系统架构和集成策略进行颠覆性变革。在本博士论文中,我们研究了在最新的CMOS电子器件中获得性能改进的两种方法。 ud我们提出了一种新颖的沟道材料SiSn,用于制造CMOS电路。这项调查与More-Moore方法是一致的,因为我们依靠已建立的CMOS工业基础设施,通过用SiSn代替硅通道来获得集成电路(IC)性能的增量变化。我们报告了一种用于获得单晶SiSn晶片的简单,低成本且与CMOS兼容的工艺。锡(Sn)以金属薄膜的形式沉积在硅晶片上,并进行退火以利于扩散到硅晶格中。这种扩散在顶表面提供了足够的SiSn层,用于制造CMOS器件。与硅控制器件相比,我们报道了SiSn沟道MOSFET的带隙减小和迁移率提高。 ud我们还提出了制造垂直集成的柔性硅以形成3D集成电路的过程。这种最新的颠覆性变化与摩尔定律相比,有望提高硅芯片的每单位面积性能。我们报告了一种通过聚合物粘合堆叠和粘合这些部件,并使用铜通过硅通孔(TSV)将它们互连的过程。我们报告了一种通过聚合物通孔(TPV)的制造过程,该过程有助于在同一柔性聚合物的相对侧上制造传感器阵列和控制电子设备。最后,我们提出了一种制造可拉伸金属薄膜的方法,该薄膜具有高达800%的可拉伸性,并报告了使用当前技术无法完成的两种不同应用的器件。

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    Hussain Aftab M.;

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  • 年度 2016
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  • 正文语种 en
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