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Work in progress: introduction of K-map based nano-logic synthesis as knowledge module in logic design course

机译:正在进行的工作:在逻辑设计课程中引入基于K-map的纳米逻辑综合作为知识模块

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摘要

This work in progress reports an effort of introducing knowledge module regarding novel nano-devices and novel logic primitives in undergraduate logic design class. Our motivation is to make our students aware of fundamental abstracted logical behaviors of future nano-devices, their functionality. This effort would also help the students use their existing knowledge of K-map based logical synthesis into constructing logic blocks for novel devices that uses majority logic as basic construct. Moreover, additional to stimulating our students' interests, we are also augmenting their learning by challenging them to use their existing knowledge to analyze, synthesize and comprehend novel nano-logic issues through the worksheets and lecture modules. Whereas many efforts are focusing on developing new courses on nanofabrication and even nano-computing, we intend to augment the existing standard EE and CS courses by inserting knowledge modules on nano-logic structure for stimulating their interest without significant diversion from the course framework.
机译:正在进行的这项工作报告了在本科逻辑设计课程中引入有关新型纳米设备和新型逻辑原语的知识模块的工作。我们的动机是使我们的学生意识到未来纳米设备的基本抽象逻辑行为及其功能。这项工作还将帮助学生利用他们现有的基于K-map的逻辑综合知识,为使用多数逻辑作为基本构造的新型设备构造逻辑块。此外,除了激发学生的兴趣外,我们还通过挑战学生利用他们现有的知识来通过工作表和讲义模块来分析,综合和理解新颖的纳米逻辑问题,从而增强他们的学习能力。尽管许多努力都集中在开发有关纳米制造甚至纳米计算的新课程上,但我们打算通过在纳米逻辑结构上插入知识模块来激发他们的兴趣而又不从课程框架中大量转移,从而扩展现有的标准EE和CS课程。

著录项

  • 作者

    Srivastava S.; Bhanja S.;

  • 作者单位
  • 年度 2007
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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