Synchronous Detection in Monolithically Integrated AM Upconversion Receivers

摘要

The thesis is focussed upon the design of a synchronous detector, intended to provide additional selectivity in an AM upconversion receiver with a tuning range from 150kHz to 30MHz and an IF frequency of (preliminarily) 70MHz. The complete receiver has to be silicon integrable with a minimum of peripheral components. The receiver circuits will be designed for a single 8V power supply. The design of the receiver front end is described in a 1989 paper by Eikenbroek, while the fundamental aspects of monolithically integrated AM receivers can be found in a 1986 paper by Nauta. Topics discussed in the report include: Design aspects of monolithically integrated AM upconversion receivers with synchronous detection; Synchronous detector architecture; Design of the synchronous detector HF circuits; Design of the on-chip continuous-time audio low-pass filter; Design of the synchronous detector LF circuits.