Manufacturing Methods and Technology Project to Establish and Improve the Producibility of Silk Screening and Layering of Ceramic Dielectric Capacitors.

摘要

The chip capacitors are to be manufactured using .0005 inch dielectric rated at 50 volts at a production rate of 5000 units per day. Internal electrodes shall be of a basemetal or alloy that will provide for an objective of 80% cost reduction from the use of palladium. End terminations shall be of the same material and must be capable of immersion for 30 seconds at 5000F in 60/40 solder.