Asynchronous Finite State Machines. Simulations with Imposed Processing Constraints

摘要

The action of computer control systems on continuous time discrete state processes can be accurately represented by asynchronous finite state machines, and, in particular, a subclass of these machines termed simple asynchronous machines, or SAMs. To understand the role that practical signal processing constraints may play in characterizing SAM behavior, a simulator capable of incorporating such constraints has been written. The architecture of this simulator and examples of its use are presented.