FPGA-based Implementation of Sliding-Window Aggregates over Disordered Data Streams

摘要

This paper proposes an order-agnostic implementation of sliding-window aggregate queries on an FPGA. Instead of buffering and reordering input tuples, the proposed approach can handle bounded disorder by using punctuations. This significantly reduces the input-to-output latency as all tuples can be processed in arrival order. The proposed approach is used to implement an example query on an FPGA, and it is demonstrated that the proposed implementation can achieve over 150M tuples/sec processing performance with low latency.