[0008] Systems, methods, and computer software are disclosed for reducing wafer patterning errors caused by a mask device. In one aspect, a method can include obtaining a first mask design having a first portion associated with an optimized pupil, where the optimized pupil results from a source-mask optimization process. An error can be located on the mask device and a second portion of the mask device with the error can be identified. The method can also include performing source optimization by utilizing the first portion and the second portion in combination to generate a reoptimized pupil. [0009] in some variations, the method can include locating the error utilizing an inspection tool. This can include performing mask inspection of the mask device with the inspection tool or wafer inspection of a wafer with the inspection tool. [0010] In other variations, the method can include obtaining a predicted result for the error. The second portion can be identified based on the predicted result. Also, the method can include determining that the predicted result for the error is above a local threshold.
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