Implementation of an Electro-Thermal Model for Junction Temperature Estimation in a SiC MOSFET Based DC/DC Converter

摘要

The junction temperature $T_{mathrm{j}}$ is an essential indicator for evaluating the thermal stress and the health of the power semiconductor devices. However, direct measurement of $T_{mathrm{j}}$ is not practical, and indirect non-invasive methods require substantial effort in building the sensing circuits which measure the $T_{mathrm{j}}$ from the temperature-sensitive electrical parameters (TSEP) of the power devices. Hence, this paper proposes a simulation-based electro-thermal junction temperature $T_{mathrm{j}}$ assessment method for the SiC MOSFETs in a half-bridge configuration based on the datasheet parameters. The proposed method estimates the MOSFETs' instantaneous power loss, including the gate driver parameters, impact of circuit parasitics and temperature-dependent reverse-recovery loss for different operating conditions. The power loss is then incorporated into a simple Foster-based thermal model to estimate the $T_{mathrm{j}}$. The effectiveness of the proposed method has been validated by comparing its results with the conventional and TSEP estimation techniques on a 10 kW three-phase interleaved boost converter (IBC) laboratory prototype.