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Precise digital integration in wide time range: theory and realization

机译:精确的数字整合在广泛的时间范围内:理论和实现

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摘要

The digital integration method based on using high-speed precision analog-to-digital converters (ADC) has become widely used over the recent years. The paper analyzes the limitations of this method that are caused by the signal properties, ADC sampling rate and noise spectral density of the ADC signal path. This analysis allowed creating digital integrators with accurate synchronization and achieving an integration error of less than 10~(-5) in the time range from microseconds to tens of seconds. The structure of the integrator is described and its basic parameters are presented. The possibilities of different ADC chips in terms of their applicability to digital integrators are discussed. A comparison with other integrating devices is presented.
机译:近年来,基于使用高速精确模数转换器(ADC)的数字集成方法已广泛使用。 本文分析了该方法的局限性是由ADC信号路径的信号性能,ADC采样率和噪声频谱密度引起的。 该分析允许创建具有准确同步的数字积分器,并在从微秒到数十秒的时间范围内实现小于10〜(-5)的集成误差。 描述了积分器的结构,并显示其基本参数。 讨论了不同ADC芯片对数字集成商的适用性的可能性。 提出了与其他集成设备的比较。

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