FPGA prototyping of low-power CPU with gated clock control

摘要

FPGA Prototyping is an efficient way to shorten the development time of an embedded system. But we can't apply this method to the embedded system including low-power CPU, because it is difficult to synthesize a low-power CPU to FPGA. We develop the way to synthesize a low-power CPU to FPGA using auto-generation of gated clocks and distribution of module stand-by signals. A large scale hardware description of SoC(System on a Chip) including a low-power CPU is automatically divided into some parts and mapped into multi-FPGA device.