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首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >A Monolithic Voltage-Scalable Fibonacci Switched-Capacitor DC–DC Converter With Intrinsic Parasitic Charge Recycling
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A Monolithic Voltage-Scalable Fibonacci Switched-Capacitor DC–DC Converter With Intrinsic Parasitic Charge Recycling

机译:具有内在寄生电荷回收的单片电压可伸缩的斐波纳契开关电容器DC-DC转换器

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摘要

Switched-capacitor converter (SCC) features a compact solution due to its magnetic-less structure, which fulfills the high density requirement in low power applications. Compared to other SCC topologies, Fibonacci switched-capacitor converter (FSC) utilizes the least number of flying capacitors to perform any voltage conversion. This paper proposes a monolithic voltage-scalable FSC, which can be used in energy harvesting applications. The challenges to implement on-chip FSC are addressed. The parasitic charge loss is substantial in FSC. Therefore, a charge recycling technique exploiting the presence of parasitic capacitors in each other phase of FSC has been employed resulting in 27% reduction in the power loss, which improves the overall efficiency by 12.7%. For a proof of concept, the proposed converter is implemented in 0.5-mu m CMOS technology on 4-mm(2) die area. The postlayout simulation is carried out using Virtuoso ADE. With 0.3-V input voltage, the system achieves 47.5% peak power efficiency with 5-mu W load.
机译:开关电容转换器(SCC)由于其磁性结构,具有紧凑的溶液,其占用低功率应用中的高密度要求。与其他SCC拓扑相比,Fibonacci开关 - 电容转换器(FSC)利用最少的飞行电容器来执行任何电压转换。本文提出了一种单片电压可伸缩的FSC,可用于能量收集应用。解决了实施片上FSC的挑战。寄生电荷损失在FSC中很大。因此,采用电力回收技术利用彼此的FSC的彼此相位的寄生电容器的存在,导致功率损耗降低27%,这将整体效率提高12.7%。对于概念证明,所提出的转换器在4毫米(2)芯片区域上以0.5-mu M CMOS技术实现。使用Virtuoso Ade进行后结仿真。具有0.3V的输入电压,系统达到47.5%的峰值功率效率,5亩。

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