Defect control by Al deposition and the subsequent post-annealing for SiGe-on-insulator substrates with different Ge fractions

摘要

SiGe-on-insulator (SGOI) substrates with different Ge fractions (Ge%) were fabricated using Ge condensation technique. High acceptor concentration (N_A) in SGOI layer and interface-trap density (D_(it)) at SGOI/buried oxide (BOX) interface were found by using back-gate metal-oxide-semiconductor field-effect transistor method. For the reduction of high N_A and D_(it), Al deposition and the subsequent post-deposition annealing (Al-PDA) were carried out. As a comparison, a forming gas annealing (FGA) was also performed in H_2 ambient. It was found that both Al-PDA and FGA effectively reduced N_A and D_(it) for low-Ge% SGOI. However, with an increase in Ge%, FGA became less effective while Al-PDA was very effective for the reduction of N_A and D_(it).