Stacking chip-scale packages

摘要

The practice of stacking packaged DRAMs to achieve higher-density memories has been around for decades. In fact, DRAM stacking dates back to IBM Corp.'s PC AT model in the mid-1980s when dual in-line packages were combined to achieve 512Kbytes of system memory. The adoption of thin small-outline packages (TSOP) in the early 1990s moved memory stacking into the mainstream, but now the DRAM industry is transitioning to chip-scale packages (CSP). These new packages are lightweight and have better electrical and thermal properties than TSOPs while offering near die-size packaging. Of the many features CSPs have to offer, however, facilitating chip stacking is not one of them.