Building blocks for wafer-level 3D integration

摘要

The microelectronic industry has arrivedrnat a crossroads. There is the challenge of continued Moore's Law scaling and the ever-growing consumer demand for smaller, faster electronics with extended and new functionalities. 3D integration is a promising and fast-growing field that addresses the convergence of Moore's Law and more than Moore. 3D integration offers a path for higher performance, higher density, higher functionality, smaller form factor, and potential cost reduction. Through this emerging field, new and improved technologies and integration schemes will be necessary to meet the associated manufacturing challenges. With the possibility of addressing different process flows, this paper describes 3D building blocks, including stacking technology as well as a low temperature layer transfer technology and a metal-to-metal bonding technique.