Advances in back-side via etching of SiC for GaN

摘要

A manufacturable SiC back-side via process has been developed for high power device applications. Etch rates >1.3μm/min with cross-wafer uniformities of <±5% have been achieved along with Ni mask selectivity in the range 30-40:1. The use of a unique descum process has resulted in pillar defect levels <1% and the vias are easily cleaned of polymer using HNO3 solutions. The same module hardware has been used to etch the GaN stopping on Au metal with automated end-point detection control. Via resistances <6E-3Ω have been achieved.