机译:具有较高k /金属栅的高迁移率压缩应变Si_(0.6)Ge_(0.5)量子阱p-MOSFET
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany,State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, CAS, Shanghai, China;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany,State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, CAS, Shanghai, China;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
CEA-LETI, M1NATEC, 17 rue des Martyrs, 38054 Grenoble, France;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
Peter Griinberg Institute 5, Forschungszentrum Juelich, 52425 Juelich, Germany;
SOITEC, Pare Technologique des Fontaines, 38190 Bemin, France;
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, CAS, Shanghai, China;
Peter Criinberg Institute 9 (PGI 9-1T), and JARA- Fundamentals of Future Intormation Technology, Forschungszentrum Juelich, 52425 Juelich. Germany;
high-k; hfo_2; laluo_3; sige; hole mobility; quantum well mosfet;
机译:使用高κ/金属栅最后工艺制造的高性能应变Si_(0.5)Ge_(0.5)量子阱p-MOSFET
机译:在稀薄的Si_(0.4)Ge_(0.6)/ LT-Si_(0.4)Ge_(0.6)/ Si(001)虚拟衬底上生长的应变Ge量子阱中的高迁移率空穴
机译:在Si_(0.6)Ge_(0.4)和Si_(0.5)Ge_(0.5)虚拟衬底上生长的拉伸应变Si层:Ⅱ。应变和缺陷
机译:具有HFO_2 / TIN栅极堆叠的高电流性SI / SI_(0.5)GE_(0.5)/紧张SOI P-MOSFET
机译:通过外部单轴应力提高迁移率的SOI上的应变锗量子阱PMOSFET
机译:使用0.25μmCmOs工艺在siGe虚拟基板上制造压缩应变的埋入沟道$ si_ {0.7} $ Ge $ _ {0.3} $ p-mOsFET