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In-depth physical investigation of GeOI pMOSFET by TCAD calibrated simulation

机译:通过TCAD校准仿真对GeOI pMOSFET进行深入的物理研究

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摘要

Simulations of germanium-on-insulator fully-depleted pMOSFET have been performed from process to device using 2D Silvaco software and compared with experimental results. A comprehensive study of these experimental results allows enlightening the specificity of GeOI devices and leads to a good description of electrical output characteristics at low and high drain-to-source voltage and for various gate lengths. More specifically, the adaptation of mobility model from silicon to germanium, a correct description of interface trap densities and a good consideration of leakage current mechanisms are the main challenges addressed in this paper for GeOI pMOSFET simulation.
机译:使用2D Silvaco软件从工艺到器件对绝缘体上锗锗完全耗尽的pMOSFET进行了仿真,并与实验结果进行了比较。对这些实验结果的全面研究可以启发GeOI器件的特异性,并可以很好地描述在低和高漏-源电压下以及各种栅极长度下的电输出特性。更具体地说,迁移模型从硅到锗的适应,对界面陷阱密度的正确描述以及对泄漏电流机制的充分考虑,是本文针对GeOI pMOSFET模拟所面临的主要挑战。

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