机译:具有横向凹槽(LRC)和连接门架构的3D NAND闪存
Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
rnInter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
rnInter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
3D NAND flash memory; bit-line stacking; laterally-recessed channel (LRC); inter-layer interference (ILI); connection gate scheme array;
机译:垂直通道三维(3D)NAND闪存中具有SiO2栅介质选择栅的新结构
机译:3D NAND闪存的架构和集成选项
机译:单电感,双输出,并联升压架构,可为集成了3D的混合固态驱动器生成ReRAM和NAND闪存编程电压
机译:多重岛门SSL解码方法的3D垂直门(3DVG)NAND闪存的存储架构及其程序抑制特性的研究
机译:使用NAND闪存的硬件安全原语
机译:具有脉冲宽度调制方案的NAND闪存架构的神经形态计算
机译:3D NaND闪存的架构和集成选项