The influence of lateral device scaling and airgap deep trench isolation on the reliability performance of 200 GHz SiGe:C HBTs

摘要

We have studied the impact of lateral device scaling on the reliability performance of the quasi self-aligned SiGe:C HBTs integrated in a 0.13 μm BiCMOS process with innovative airgap deep trench isolation. The lateral scaling reduces the parasitics of the devices and improves the device performance. A novel scheme for deep trench isolation, which uses an airgap as insulator, has been incorporated in the standard 0.13 μm BiCMOS process. The peripheral substrate parasitics decrease with an order of magnitude, which significantly improves the device RF performance. In this work we will present the impact of the lateral scaling and the airgap deep trench isolation on the reliability performance. Three regimes of degradation have been addressed: reverse emitter-base current stress, very high forward current stress and mixed-mode stress.