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New design of a linear double-sided printed dipole array based on bat algorithm for interference suppression in the first sidelobe direction

机译:基于BAT算法在第一个侧链方向干扰抑制的基于BAT算法的线性双面印刷偶极子阵列的新设计

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摘要

This study proposes a design of a double-sided printed dipole (DSPD) antenna array with a low first sidelobe level (FSLL) for interference suppression. The proposed array consists of ten DSPD antennas based on the Rogers RO4003C substrate (e(r) = 3.55). The FSLL has been compressed by imposing a single null at the centre of the first sidelobe. The excitation power distribution of the array has been calculated by using the bat algorithm with the amplitude-only control technique and has been implemented by a series-fed network. A back reflector, which is based on an FR4 substrate (e(r) = 4.4), has been used to improve the maximum gain. The simulation results show that the FSLL can be reduced with a null deep level (NDL) of -40 dB in theE-plane at the frequency of 3.5 GHz, while the maximum gain of the array is around 17.7 dBi, and the bandwidth is 600 MHz (3.3-3.9 GHz) with -10 dB ofS(11). A prototype of the proposed DSPD antenna array has been fabricated and measured. A good agreement can be achieved between simulation and measurement results.
机译:本研究提出了一种设计双面印刷偶极(DSPD)天线阵列,具有低的第一侧链电平(FSLL),用于干扰抑制。所提出的阵列基于罗杰斯RO4003C衬底(E(R)= 3.55)的十个DSPD天线组成。通过在第一个Sidelobe的中心施加单个空来压缩FSLL。已经通过使用幅度控制技术的BAT算法计算阵列的激励功率分布,并且已经由串联馈送网络实现。基于FR4基板(E(R)= 4.4)的后反射器已被用于提高最大增益。模拟结果表明,在3.5 GHz的频率下,可以使用-40 dB的空深层(NDL)减少FSLL,而阵列的最大增益约为17.7 dbi,带宽为600 MHz(3.3-3.9 GHz),带-10 dB(11)。已经制造和测量了所提出的DSPD天线阵列的原型。仿真和测量结果之间可以实现良好的一致性。

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